Reports

1. JTEC Panel Report on Electronic Manufacturing and Packaging in Japan: Final Report, International Technology Research Institute at Loyola College, February 1995, ISBN 1-883712-37-8.
2. Verhofstadt, Peter, 1993 Annual Report of Research, Volume 1: Design Sciences (Millissa S. Allen and Nacia Avera, eds.), Semiconductor Research Corp., February 1994.
3. Kelly, John, 1993 Annual Report of Research, Volume V: Packaging Sciences (Millissa S. Allen and Nacia Avera, eds.), Semiconductor Research Corp., February 1994.
4. CINDAS Report 109:   Thermal, Mechanical, Electrical, and Physical Properties of Selected Packaging Materials (Part 2), Prepared for Semiconductor Research Corp., December 1993.
5. JTEC Panel Report on X-Ray Lithography in Japan: Final Report, Coordinated by Loyola College in Maryland, October 1991, NTIS Report # PB92-100205.
6. JTEC Program Summary (Patricia N. Rogers, ed.), Coordinated by Loyola College in Maryland, September 1991.
7. Materials Science and Engineering Laboratory: Polymers, Technical Activities 1995, NSTIR 5749, U.S. Dept. of Commerce, Technical Administration, National Institute of Standards and Technology.
8. Prismark, The Electronics Industry Report, 1998-1999.
9. Prismark, The Electronics Industry Report, 2001.
10. CINDAS Report 114 - Volume 1: Thermal, Mechanical, Electrical, and Physical Properties of Selected Packaging Materials (Part 62), Prepared for Semiconductor    Research Corp., August 1995.
11. CINDAS Report 114 - Volume 2: Thermal, Mechanical, Electrical, and Physical Properties of Selected Packaging Materials (Part 62), Prepared for Semiconductor Research Corp., August 1995.
12. Prismark, Chip Scale Substrates: Organic Substrate Opportunities for Bare Chip and Array Packages, January 1995.